JC-45.5 CHAIRMAN
Committee for
defining electrical specifications for Module Interconnect (i.e., sockets)
JC-45.3 CHAIRMAN
Committee for
defining specifications for Small Memory Modules
JC-42.3C CHAIRMAN
Committee for
defining DRAM Timing and Parametrics
JC-45.1 VICE CHAIRMAN
Committee for
defining Registered and Load Reduced Memory Modules
4 RANK RDIMM CHAIRMAN
Task Group for
defining 4 rank registered memory modules
KNOWN GOOD DIE DIMM
CHAIRMAN
Task Group for
defining memory modules using direct die attach of known good devices
SPD CHAIRMAN
Task Group for
defining Serial Presence Detect device specifications and contents
DIMM LABELS CHAIRMAN
Task Group for
defining standardized labels for all memory modules
JEDECWORKS WEB MASTER
Created and
maintained the largest collection of JEDEC task group data including
RDIMMs, Registering Clock Drivers, 4 Rank DIMMs, Very Low Profile DIMMs,
KGD DIMMs, SPDs, DIMM Labels, Module Interconnect
|
JEDEC TECHNICAL
ACHIEVEMENT AWARD
Recognition for
assisting in the development of DDR SDRAM and the SO-DIMM
CHAIRMAN'S AWARD,
JC-42
Recognition for
supporting the development of DRAM products
CHAIRMAN'S AWARD,
JC-45.3C
Recognition for
driving the development of DDR parametrics
CHAIRMAN'S AWARD,
JC-45.5
Recognition for
driving the parametrics for sockets
DDR INDUSTRY SUMMIT
AWARD
Recognition for
contributions to the successful deployment of DDR
|